What I'm currently trying to figure out is if I have vertex and index memory within the same buffer what are the alignment requirements on that. At first glance the spec does not seem to say anything about it but I know that's not possible. NVidia says over and over to do that strategy but they don't ever say how.
The closest thing I've found seems to state that the vertices need to be aligned to their first individual element boundary, but theres a range of answers from "pretend you're allocating a buffer and use that" to "it depends on the hardware lmfao"
Fe₂🦀₃⋅H₂🦀 /
npub1y6…69wl9
2025-05-06 13:36:52
Author Public Key
npub1y6tk68elxfcrz8yx5kf32agav67hwz4rt2ff22f8rl98yxh7uxhsx69wl9Seen on
wss://relay.mostr.pubPublished at
2025-05-06 13:36:52Event JSON
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"content": "What I'm currently trying to figure out is if I have vertex and index memory within the same buffer what are the alignment requirements on that. At first glance the spec does not seem to say anything about it but I know that's not possible. NVidia says over and over to do that strategy but they don't ever say how. \n\nThe closest thing I've found seems to state that the vertices need to be aligned to their first individual element boundary, but theres a range of answers from \"pretend you're allocating a buffer and use that\" to \"it depends on the hardware lmfao\"",
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