nprofile1qy2hwumn8ghj7un9d3shjtnddaehgu3wwp6kyqpq00pce86why7sp4zf237kplxk2g8zterc6wmfw4fywhjs953ggazq54hrac (nprofile…hrac) Do CPUs desperately need more ILP? I thought modern CPUs were quite crazy good at that (Apple is a good example).
I think the issue is most software isn't parallelizable and sequential code is much easier to reason about... that's why VLIW didn't really catch on. Nobody wants to schedule instructions manually, and compilers aren't any better at it than superscalar CPU frontends.
That's how we ended up with the CPU/GPU dichotomy. Sequential code that can be parallelized at the batch level ("SPMD") runs on multicore CPUs, the subset of that which can process multiple data units at once uses SIMD (manually or autovectorized), and embarrassingly parallel code (low branching) that doesn't need low latency for dispatch ends up as SIMT on GPUs, while still being programmed mostly as sequential code working on a single unit (the parallelization is implemented in hardware/drivers).
At the end of the day there will always be underutilized silicon... any time you have different types of resources (ALUs, etc.) their distribution will never match the usage of real world workloads most of the time.
Asahi Lina (朝日リナ) /
npub14w…zuequ
2025-04-16 10:33:55
in reply to nevent1q…sjq2
Author Public Key
npub14w78207els8vs5fxduhhval0r9zgujpf2khcqyfuhmkt2tlyvcyq2zuequPublished at
2025-04-16 10:33:55Event JSON
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