How do you fix #RISCV to have good performance? Let's see how the people at #Tenstorrent do it:
rv64imafdcv_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicond_zicsr_zifencei_zihintntl_zihintpause_zimop_za64rs_zawrs_zfa_zfbfmin_zfh_zcb_zcmop_zba_zbb_zbs_zvbb_zvbc_zvfbfwma_zvfh_zvkng_zvl256b
Easy, just keep adding instructions until you have a good ISA.
Some of these are:
zba - Address calculation extension.
zbb - Basic bit manipulation extension.
zicond - Integer conditional operations extension.
zbs - Single-bit operation extension.
zvbb - Vector basic bit-manipulation extension.
zicbom - Cache-block management extension.
zicbop - Cache-block prefetch extension.
zicboz - Cache-block zero extension.
zcb - Simple compressed instruction extension.
ziccif - Main memory supports instruction fetch with atomicity requirement.
ziccamoa - Main memory supports all atomics in A
zicclsm - Main memory supports misaligned loads/stores.
ziccrse - Main memory supports forward progress on LR/SC sequences.
zicsr - Control and status register access extension.
zifencei - Instruction-fetch fence extension.
zihintntl - Non-temporal locality hints extension.
zihintpause - Pause hint extension.
zawrs - Wait-on-reservation-set extension.
shac ron ₪ /
npub1vm…arx56
2024-12-16 20:30:58
Author Public Key
npub1vmtnnusyhm9gchr0w0m8p52w5mjv4kv4a7n5xqd9hhucqunjy8pq8arx56Published at
2024-12-16 20:30:58Event JSON
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"content": "How do you fix #RISCV to have good performance? Let's see how the people at #Tenstorrent do it:\n\nrv64imafdcv_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ziccrse_zicond_zicsr_zifencei_zihintntl_zihintpause_zimop_za64rs_zawrs_zfa_zfbfmin_zfh_zcb_zcmop_zba_zbb_zbs_zvbb_zvbc_zvfbfwma_zvfh_zvkng_zvl256b\n\nEasy, just keep adding instructions until you have a good ISA.\n\nSome of these are:\nzba - Address calculation extension.\nzbb - Basic bit manipulation extension.\nzicond - Integer conditional operations extension.\nzbs - Single-bit operation extension.\nzvbb - Vector basic bit-manipulation extension.\nzicbom - Cache-block management extension.\nzicbop - Cache-block prefetch extension.\nzicboz - Cache-block zero extension.\nzcb - Simple compressed instruction extension.\nziccif - Main memory supports instruction fetch with atomicity requirement.\nziccamoa - Main memory supports all atomics in A\nzicclsm - Main memory supports misaligned loads/stores.\nziccrse - Main memory supports forward progress on LR/SC sequences.\nzicsr - Control and status register access extension.\nzifencei - Instruction-fetch fence extension.\nzihintntl - Non-temporal locality hints extension.\nzihintpause - Pause hint extension.\nzawrs - Wait-on-reservation-set extension.",
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