Rasmus SA5RJS on Nostr: 6) More power measurements, at two bias levels I wanted to know how the input power ...

6) More power measurements, at two bias levels

I wanted to know how the input power and gate bias voltage together affected the output power. So I ran some tests for two bias levels. The first series of tests were made with 38 mA total quiescent current, so about 8 mA Id for each FET. The board draws 22 mA with zero drain current. The second series of tests were made with 64 mA total quiescent current, so about 21 mA drain current per FET.

The results can be seen in the table in the picture. I might edit this post later and type it to text. See the ALT text for definitions of the columns.

Since the current (and output power) changed over time, I read the meters some seconds (maybe 5) after I turned on the input signal. The values varied a lot, so these measurements are not super reliable.

Also, the power supply seems to current limit about 6 A. It's a 4.5 A power supply anyway, so the results at these levels are doubly unreliable.