While reading some x64 assembly today, I took a moment to be grateful for a sequential and directly addressable text segment (granted it's shared object code) but I spent like 5 years de-compiling early 80s 8-bit MCU binaries with indirect addressing and multi text banks. btw the exact ISA was unknown because the CPU's were application specific, but did closely resemble early x86 before it was established I believe.
Reading
jmp 8fb3
Compared to
jmp %(r82) + $0x1f ; what address is in r82???
then having to re-read the segment register initialization procedure to get the addresses, then keep track in spreadsheet. BLAH it sucked XD I eventually built tools to help, but it was still an painful process
ChipTuner
npub1qd…3fqm7
2024-11-11 04:21:43
Author Public Key
npub1qdjn8j4gwgmkj3k5un775nq6q3q7mguv5tvajstmkdsqdja2havq03fqm7Published at
2024-11-11 04:21:43Event JSON
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"tags": [],
"content": "While reading some x64 assembly today, I took a moment to be grateful for a sequential and directly addressable text segment (granted it's shared object code) but I spent like 5 years de-compiling early 80s 8-bit MCU binaries with indirect addressing and multi text banks. btw the exact ISA was unknown because the CPU's were application specific, but did closely resemble early x86 before it was established I believe. \n\nReading \n jmp 8fb3\n\nCompared to \n jmp %(r82) + $0x1f ; what address is in r82???\n\nthen having to re-read the segment register initialization procedure to get the addresses, then keep track in spreadsheet. BLAH it sucked XD I eventually built tools to help, but it was still an painful process\n\n",
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}