Why Nostr? What is Njump?
2023-06-07 18:01:23
in reply to

Matt Corallo [ARCHIVE] on Nostr: 📅 Original date posted:2017-05-26 📝 Original message:Your proposal seems to be ...

📅 Original date posted:2017-05-26
📝 Original message:Your proposal seems to be simply BIP 91 tied to the
as-yet-entirely-undefined hard fork Barry et al proposed.

Using James' BIP 91 instead of the Barry-bit-4/5/whatever proposal, as
you propose, would make the deployment on the incredibly short timeline
Barry et al proposed slightly more realistic, though I would expect to
see hard fork code readily available and well-tested at this point in
order to meet that timeline.

Ultimately, due to their aggressive timeline, the Barry et al proposal
is incredibly unlikely to meet the requirements of a
multi-billion-dollar system, and continued research into meeting the
spirit, not the text, of their agreement seems warranted.

Matt

On 05/26/17 17:47, Jacob Eliosoff via bitcoin-dev wrote:
> Forgive me if this is a dumb question. Suppose that rather than
> directly activating segwit, the Silbert/NYC Segwit2MB proposal's lock-in
> just triggered BIP141 signaling (plus later HF). Would that avoid
> incompatibility with existing BIP141 nodes, and get segwit activated
> sooner? Eg:
>
> - Bit 4 (or bit 5 or whatever, now that BIP91 uses 4) signals support
> for "segwit now, HF (TBD) at scheduled date (Nov 23?)"
> - If bit 4 support reaches 80%, it locks in two things: the scheduled HF
> (conditional on segwit), and *immediately* turning on bit 1 (BIP141 support)
>
> I realize this would still leave problems like the aggressive HF
> schedule, possible chain split at the HF date between Segwit2MB nodes
> and any remaining BIP141 nodes, etc. My focus here is how
> incompatibility with existing nodes could be minimized.
>
> (BIP91 could also be used if BIP141 support still fell short of 95%.
> But if Segwit2MB support reaches 80%, it seems likely that an additional
> 15% will support BIP141-without-HF.)
>
>
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Author Public Key
npub1e46n428mcyfwznl7nlsf6d3s7rhlwm9x3cmkuqzt3emmdpadmkaqqjxmcu